? 2000 semtech corp. 652 mitchell road newbury park ca 91320 400ma smartldo tm sc1534 preliminary - july 26, 2000 1 tel:805-498-2111 fax:805-498-3804 web:http:// www.semtech.com features ? = glitch-free transition between input sources ? = internal logic selects input source ? = gate drive for external pmos bypass switch ? = 5v detector with hysteresis ? = 1% regulated output voltage accuracy ? = 400ma load current capability ? = so-8 and to-263 packages applications ? = desktop computers ? = network interface cards (nics) ? = pcmcia/pci interface cards ? = cardbus tm technology ? = power supplies with multiple input sources absolute maximum ratings parameter symbol maximum units input supply voltage vin -0.5 to +7 v auxiliary supply voltage vaux -0.5 to +7 v ldo output current i o 10 to 400 ma operating ambient temperature range t a -5 to +70 c operating junction temperature range t j -5 to +125 c storage temperature range t stg -65 to +150 c lead temperature (soldering) 10 sec t lead 300 c thermal impedance junction to ambient so-8 (1) to-263 ja 65 60 c/w thermal impedance junction to case so-8 to-263 j c 39 3 c/w esd rating esd 2 kv ordering information part number (1) package sc1534cm.tr to-263-5l sc1534cs.tr so-8 note: (1) only available in tape and reel packaging. block diagram description the sc1534 is designed to maintain a glitch-free 3.3v output when at least one of two inputs, 5v (vin) and 3.3v (vaux), is present. whenever vin exceeds a predetermined threshold value, the internal 3.3v linear regulator is enabled, and dr is pulled high. when vin falls below a lower threshold value, dr is pulled low and the internal linear regulator is turned off. dr has been designed to drive the gate of an external low threshold p-channel mosfet, which can be used to connect the 3.3v supply directly to the regulator out- put. this ensures an uninterrupted 3.3v output even if vin falls out of specification. a maximum r ds(on) of 200m ? is recommended. when both supplies are simultaneously available, the drive pin (dr) will be pulled high, turning off the exter- nal pmos switch. the internal 5v detector has its upper threshold (for vin rising) set to 4.22v (typical) while the lower thresh- old (for vin falling) is at 4.05v (typical) giving a hys- teresis of approximately 170mv. the sc1534 is available in the popular so-8 and 5- lead to-263 surface mount packages. note: (1) 1 inch square of 1/16? fr-4, double sided, 1 oz. mini- mum copper weight. pin configuration to-263-5l so-8 top view
? 2000 semtech corp. 652 mitchell road newbury park ca 91320 400ma smartldo tm sc1534 preliminary - july 26, 2000 2 application circuit note: (1) external switch (q1): use a low threshold p-channel mosfet such as fairchild fdn338p or international rectifier irf7604, or equivalent. (pmos, typical gate threshold voltage ~ 1v, r ds(on) < 200m ? at v gs = 2.7v). 3.3v out 3.3vaux 5v 5v 3.3vaux 3.3v out c3 0.1uf c4 10uf c2 4.7uf c5 0.1uf q1 c1 0.1uf u1 sc1534cm 1 2 3 4 5 vin vaux gnd vo dr tab u1 sc1534cs 1 2 3 4 5 6 7 8 vaux vin vo dr gnd gnd gnd gnd c2 4.7uf q1 c4 10uf c1 0.1uf c3 0.1uf c5 0.1uf pin description pin name so-8 pin # to-263-5l pin # pin function dr 4 5 driver output for external p-channel mosfet pass element. gnd 5,6,7,8 3/tab logic and power ground. vaux 1 1 this is the auxiliary input supply, nominally 3.3v. vin 2 2 this is the main input supply for the ic, nominally 5v. vo 3 4 ldo 3.3v output.
? 2000 semtech corp. 652 mitchell road newbury park ca 91320 400ma smartldo tm sc1534 preliminary - july 26, 2000 3 electrical characteristics unless specified, t a = 25c, vin = 5v, vaux = 3.3v, i o = 400ma, c o = 10f. values in bold apply over full operating temperature range. parameter symbol test conditions min typ max units vin supply voltage vin vaux = 0v 4.35 5.00 5.50 v quiescent current i q vin = 5v, vaux = 0v, i o = 0ma 8.0 11.0 ma 13.0 vin = 5v, vaux = 3.3v, i o = 0ma 10.0 14.0 ma 15.0 reverse leakage from vaux i vin vaux = 3.6v, vin = 0v, i o = 0ma -1.5 -3.0 ma -4.0 vaux supply voltage vaux 3.0 3.3 3.6 v quiescent current i q(aux) vaux = 3.3v, vin = 0v, i o = 0ma 8.0 11.0 ma 13.0 vaux = 3.3v, vin = 5v, i o = 0ma 1.5 2.5 ma 3.0 reverse leakage from vin i vaux vin = 5.5v, vaux = 0v, i o = 0ma -5.0 -50.0 a -100.0 5v detect (1)(2)(3) low threshold voltage v th(lo) vin falling, i o = 20ma 3.92 4.05 4.18 v 3.90 4.20 hysteresis v hyst 90 170 mv 80 high threshold voltage v th(hi) vin rising, i o = 20ma 4.35 v vo ldo output voltage vo i o = 20ma 3.267 3.300 3.333 v 4.35v vin 5.5v, 0ma i o 400ma 3.234 3.366 output current i o 400 ma line regulation reg (line) vin = 4.35v to 5.5v 0.20 0.60 % 0.80 load regulation reg (load) i o = 20ma to 400ma 0.20 0.80 % 1.00
? 2000 semtech corp. 652 mitchell road newbury park ca 91320 400ma smartldo tm sc1534 preliminary - july 26, 2000 4 electrical characteristics unless specified, t a = 25c, vin = 5v, vaux = 3.3v, i o = 400ma, c o = 10f. values in bold apply over full operating temperature range. parameter symbol test conditions min typ max units drive output drive voltage v dr 4.35v vin 5.5v, i dr = 200a 3.4 vin - 0.8 v 3.3 vin < v th(lo) , i dr = -200a 35 150 mv 250 peak drive current i dr(pk) sinking: vin = 3.9v, v dr = 1v; 7 ma sourcing: vin = 4.35v, vin - v dr = 2.5v 6 drive high delay (1)(4) t dh c dr = 1.2nf, vin ramping up, measured 0.5 1.0 s from vin = v th(hi) to v dr = 2v 2.0 drive low delay (1)(4) t dl c dr = 1.2nf, vin ramping down, measured 0.5 1.0 s from vin = v th(lo) to v dr = 2v 2.0 notes: (1) guaranteed by design. (2) see 5v detect thresholds on page 5. (3) recommended source impedance for 5v supply: 0.125 ? . this will ensure that i o x r source < v hyst , thus avoiding dr toggling during 5v detect threshold transitions. (4) see timing diagram on page 5.
? 2000 semtech corp. 652 mitchell road newbury park ca 91320 400ma smartldo tm sc1534 preliminary - july 26, 2000 5 timing diagram note: (1) vin rise and fall times (10% to 90%) to be = 100ns. 5v detect thresholds note: (1) vin rise and fall times (10% to 90%) to be = 100s.
? 2000 semtech corp. 652 mitchell road newbury park ca 91320 400ma smartldo tm sc1534 preliminary - july 26, 2000 6 outline drawing - so-8 jedec ref: ms-012aa minimum land pattern - so-8
? 2000 semtech corp. 652 mitchell road newbury park ca 91320 400ma smartldo tm sc1534 preliminary - july 26, 2000 7 device outline - to-263, 5 pin minimum land pattern - to-263, 5 pin ecn00-1212
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